Table of Contents


ltlsynt - reactive synthesis from LTL specifications


ltlsynt [OPTION...]


Synthesize a controller from its LTL specification.

Input options:


Read a parity game in Extended HOA format instead of building it.

-f, --formula=STRING

process the formula STRING

-F, --file=FILENAME[/COL]

process each line of FILENAME as a formula; if COL is a positive integer, assume a CSV file and read column COL; use a negative COL to drop the first line of the CSV file


comma-separated list of uncontrollable (a.k.a. input) atomic propositions, interpreted as a regex if enclosed in slashes


read all formulas using LBT’s prefix syntax


parenthesized blocks that cannot be parsed as subformulas are considered as atomic properties


comma-separated list of controllable (a.k.a. output) atomic propositions, , interpreted as a regex if enclosed in slashes


Read a TLSF specification from FILENAME, and call syfco to convert it into LTL

Output format:

-8, --utf8

enable UTF-8 characters in output (ignored with --lbtt or --spin)


test for the additional property PROP and output the result in the HOA format (implies -H). PROP may be some prefix of ’all’ (default), ’unambiguous’, ’stutter-invariant’, ’stutter-sensitive-example’, ’semi-determinism’, or ’strength’.

-d, --dot[=1|a|A|b|B|c|C(COLOR)|e|E|f(FONT)|h|i(ID)|k|K|n|N|o|r|R|s|t|

GraphViz’s format. Add letters for (1) force numbered states, (a) show acceptance condition (default), (A) hide acceptance condition, (b) acceptance sets as bullets, (B) bullets except for Büchi/co-Büchi automata, (c) force circular nodes, (C) color nodes with COLOR, (d) show origins when known, (e) force elliptic nodes, (E) force rEctangular nodes, (f(FONT)) use FONT, (g) hide edge labels, (h) horizontal layout, (i) or (i(GRAPHID)) add IDs, (k) use state labels when possible, (K) use transition labels (default), (n) show name, (N) hide name, (o) ordered transitions, (r) rainbow colors for acceptance sets, (R) color acceptance sets by Inf/Fin, (s) with SCCs, (t) force transition-based acceptance, (u) hide true states, (v) vertical layout, (y) split universal edges by color, (+INT) add INT to all set numbers, (<INT) display at most INT states, (#) show internal edge numbers

-H, --hoaf[=1.1|i|k|l|m|s|t|v]

Output the automaton in HOA format (default). Add letters to select (1.1) version 1.1 of the format, (b) create an alias basis if >=2 AP are used, (i) use implicit labels for complete deterministic automata, (s) prefer state-based acceptance when possible [default], (t) force transition-based acceptance, (m) mix state and transition-based acceptance, (k) use state labels when possible, (l) single-line output, (v) verbose properties


LBTT’s format (add =t to force transition-based acceptance even on Büchi automata)


set the name of the output automaton

-o, --output=FORMAT

send output to a file named FORMAT instead of standard output. The first automaton sent to a file truncates it unless FORMAT starts with ’>>’.

-q, --quiet

suppress all normal output

-s, --spin[=6|c]

Spin neverclaim (implies --ba). Add letters to select (6) Spin’s 6.2.4 style, (c) comments on states

--stats=FORMAT, --format=FORMAT

output statistics about the automaton

Fine tuning:


choose the algorithm for synthesis: "sd": translate to tgba, split, then determinize; "ds": translate to tgba, determinize, then split; "ps": translate to dpa, then split; "lar": translate to

a deterministic automaton with arbitrary

acceptance condition, then use LAR to turn to parity, then split (default); "lar.old": old version of LAR, for benchmarking; "acd": translate to a deterministic automaton with arbitrary acceptance condition, then use ACD to turn to parity, then split.


whether to try to avoid to construct a parity game (enabled by default)


whether to decompose the specification as multiple output-disjoint problems to solve independently (enabled by default)


whether to remove atomic propositions that are always equivalent to another one (enabled by default, both before and after decomposition)


whether to remove atomic propositions that always

have the same polarity in the formula to speed

things up (enabled by default, both before and after decomposition)


simplification to apply to the controller (no) nothing, (bisim) bisimulation-based reduction, (bwoa) bisimulation-based reduction with output assignment, (sat) SAT-based minimization, (bisim-sat) SAT after bisim, (bwoa-sat) SAT after bwoa. Defaults to ’bwoa’.

Output options:


encode the winning strategy as an AIG circuit and print it in AIGER format. The first word indicates the encoding to used: "ite" for If-Then-Else normal form; "isop" for irreducible sum of products; "both" tries both and keeps the smaller one. Other options further refine the encoding, see aiger::encode_bdd. Defaults to "ite".


output statistics as CSV in FILENAME or on standard output (if ’>>’ is used to request append mode, the header line is not output)


Use dot format when printing the result (game, strategy, or AIG circuit, depending on other options). The options that may be passed to --dot depend on the nature of what is printed. For games and strategies, standard automata rendering options are supported (e.g., see ltl2tgba --dot). For AIG circuit, use (h) for horizontal and (v) for vertical layouts.


Hide the REALIZABLE or UNREALIZABLE line. (Hint: exit status is enough of an indication.)


print the parity game in the HOA format, do not solve it


print the parity game in the pgsolver format, do not solve it


realizability only, do not compute a winning strategy

Miscellaneous options:


print this help


verbose mode


verify the strategy or (if demanded) AIG against the formula


print program version

-x, --extra-options=OPTS

fine-tuning options (see spot-x (7))

Mandatory or optional arguments to long options are also mandatory or optional for any corresponding short options.

Exit status:


if all input problems were realizable


if at least one input problem was not realizable


if any error has been reported


If you would like to give a reference to this tool in an article, we suggest you cite the following papers:

Florian Renkin, Philipp Schlehuber-Caissier, Alexandre Duret-Lutz, and Adrien Pommellet. Dissecting ltlsynt. In Formal Methods in System Design, 2023.

Thibaud Michaud and Maximilien Colange. Reactive Synthesis from LTL Specification with Spot. In proceedings of SYNT@CAV’18.


Report bugs to <spot@lrde.epita.fr>.


Copyright © 2024 by the Spot authors, see the AUTHORS File for details. License GPLv3+: GNU GPL version 3 or later.
This is free software: you are free to change and redistribute it. There is NO WARRANTY, to the extent permitted by law.